Yesterday I read about Intel’s upcoming Xeon Phi Co-processor with 50+ x86-compatible cores. As per the graphics, the co-processor will provide a teraflop of performance and occupy just one PCIe slot. It’s great to see that Intel and other vendors are able to provide such phenomenal computing power, by adding cores in a single processor chip. We always knew that GPUs with their large number of cores offer phenomenal power in SIMD mode. Moreover GPGPU has unleashed the power for other than graphics-intensive work. However, for Xeon Phi, it does not seem to be strict SIMD only. After reading these news, I confess that I am tempted to look at the field holistically and just blog my muddling thoughts in some order. So what is the theme? Theme is ‘Computation is following biologically evolutionary path’. First, I will try to articulate past, present and vaguely the future of the microprocessors. Later, I will attempt to identify similarities with biological evolution.
Evolution of Intel and AMD microprocessors (as representative) till today –
- Inetl 4004 – First single chip microprocessor.
- Intel 8086 – First microprocessor with x86 instruction set.
- Intel 80386 – First 32-bit microprocessor and built for multitasking.
- Intel 80486 – Microprocessor with inbuilt math co-processor. This marks beginning of heterogeneous micro-architecture era. However, it could not go much further for a decade.
- Intel Pentium – Superscalar implementation for x86 architecture and with multiprocessing support.
- Intel Pentium D – First multicore microprocessor.
- Intel Pentium M – Introduction of energy efficiency features.
- Intel Core – Scalable and energy efficient microarchitecture (till today, it supports up to eight cores).
- AMD APU – First microprocessor with inbuilt GPU cores. This is rejuvenation of heterogeneous micro-architecture and now has momentum.
- Intel Xeon Phi – First Intel microprocessor with many-integrated-core implementation supporting x86 cores. Moreover, this fits in the system as an add-on card with its own little Linux OS.
In future, it may continue as –
- 1000+ core microprocessor. Each core will be a simple one (most likely an ARM-variant).
- More hybrid processors will be launched. For example, a processor will have ‘8 cores’ such that ‘4 x86 cores’, ‘1 ARM core’, ‘1 GPU core’, ‘2 ASIC core’ and so on.
- Reconfigurable microprocessors – Processors can have emulation mode. For example, a processor can be configured to have all ‘x86 cores’ in the morning and all ‘ARM cores’ in the evening, using system BIOS.
- Upgradable instruction sets. For example, I can upgrade from Core i5 to Core i7 and that too only for a few cores. It appears that upgradeable instruction is required for reconfiguration, but not strictly. Reconfigurable microprocessors and upgradeable instruction set microprocessors may follow one another, in quick succession and the order of their arrivals depends upon level of flexibility achieved for each requirement.
- Computing dust. Processors would grow smaller and smaller to an extent that a ‘not-so-advanced‘ processor with size of a grain or a even dust particle. I cite Hitachi RFID powder chip, although it is not a microprocessor, as a beginning. What is significant here is organization of these resources and their interconnects. A liquid network medium is quite possible and may provide substantial advantage over contemporary ones. (Let me call it a ‘Swimming Tank Interconnect’ 😀 )
Quite exciting !
I don’t want to attach any dates to these milestones, but given the trend, we can say with fair accuracy that amorphous computing should become reality by 2016 and part of every day life by 2022.
Each of these would demand significant reorientation in software development paradigm, especially the last milestone. In a separate post, I will articulate each of these challenges and possible paradigm adaptations.
…to be concluded !